Figure 3-13. R-S flip-flop with inverted inputs timing diagram.

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INTRODUCTION - Continued

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Neets Module 13-Introduction to Number Systems and Logic Circuits

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TOGGLE FLIP-FLOP

3-13 Figure 3-13. —R-S flip-flop with inverted inputs timing diagram. Figure 3-14 shows two methods of constructing an R-S FF. We can use these diagrams to prove the Truth Table for the R-S FF. Figure 3-14. —R-S FF construction: A. Using cross-coupled NAND gates; B. Using cross-coupled OR gates.