Figure 3-18. J-K flip-flop: A. Standard symbol; B. Truth Table; C. Timing diagram.
The J-K is a five-input device. The J and K inputs are for data. The CLK input is for the clock; and
the PS and CLR inputs are the preset and clear inputs, respectively. The outputs Q and Q are the normal
Observe the Truth Table and timing diagram in figure 3-18, views B and C, as the circuit is