3-29
Input pulse 2 will produce a HIGH output from AND gate 2 since AND gate 2 is the only one with
HIGHs on both inputs. The HIGH from AND gate 2 causes FF2 to reset and FF3 to set. Indicator B goes
out and C goes on.
Pulse 3 will cause AND gate 3 to go HIGH. This results in FF3 being reset and FF4 being set. Pulse
4 causes FF4 to reset and FF1 to set, bringing the counter full circle to the initial conditions. As long as
the counter is operational, it will continue to light the lamps in sequence 1, 2, 3, 4; 1, 2, 3, 4, etc.
As we stated at the beginning of this section, only one FF may be in the specified condition at one
time. The specified condition shifts one position with each input pulse.
Q45. In figure 3-26, view A, which AND gate causes FF3 to set?
Q46. Which AND gate causes FF3 to reset?
Q47. What causes the specified condition to shift position?
Q48. If the specified state is OFF, how many FFs may be off at one time?
Down Counters
Up to this point the counters that you have learned about have been up counters (with the exception
of the ring counter). An up counter starts at 0 and counts to a given number. This section will discuss
DOWN counters, which start at a given number and count down to 0.
Up counters are sometimes called INCREMENT counters. Increment means to increase. Down
counters are called DECREMENT counters. Decrement means to decrease.
A three-stage, ripple down counter is shown in figure 3-27, view A. Notice that the PS (preset) input
of the J-K FFs is used in this circuit. HIGHs are applied to all the J and K inputs. This enables the FFs to
toggle on the input pulses.
