3-18Figure 3-18. —J-K flip-flop: A. Standard symbol; B. Truth Table; C. Timing diagram.The J-K is a five-input device. The J and K inputs are for data. The CLK input is for the clock; andthe PS and CLR inputs are the preset and clear inputs, respectively. The outputs Q and Q are the normalcomplementary outputs.Observe the Truth Table and timing diagram in figure 3-18, views B and C, as the circuit isexplained.
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