3-32
Before we go through the operation of the register, let’s set some initial conditions. Assume that
inputs A, B, and D are HIGH and that FF2 and FF4 are set from a previous operation. The READ IN,
READ OUT, and RESET inputs are all LOW.
To begin the operation, we apply a reset pulse to the RESET input of all the FFs, clearing the Q
outputs to LOWs. This step ensures against any erroneous data transfer that would occur because of the
states of FF2 and FF4.
Inputs A, B, C, and D are input to gates 1, 2, 3, and 4, respectively. When the READ IN input goes
HIGH, AND gates 1, 2, and 4 go HIGH, causing FF1, FF2, and FF4 to set. The output of AND gate 3
does not change since the C input is LOW. The 4-bit word, 1101, is now stored in the register. The
outputs of FFs 1, 2, 3, and 4 are applied to AND gates 5, 6, 7, and 8, respectively.
When the data is required for some other operation, a positive-going pulse is applied to the READ
OUT inputs of the AND gates. This HIGH, along with the HIGHs from the FFs, causes the outputs of
AND gates 5, 6, and 8 to go HIGH. Since the Q output of FF3 is LOW, the output of gate 7 will be LOW.
The 4-bit word, 1101, is transferred to where it is needed.
Q51. How many stages are required to store a 16-bit word?
Q52. Simultaneous transfer of data may be accomplished with what type of register?
Q53. How are erroneous transfers of data prevented?
SHIFT REGISTERS
A shift register is a register in which the contents may be shifted one or more places to the left or
right. This type of register is capable of performing a variety of functions. It may be used for serial-to-
parallel conversion and for scaling binary numbers.
Before we get into the operation of the shift register, let’s discuss serial-to-parallel conversion,
parallel-to-serial conversion, and scaling.
Serial and Parallel Transfers and Conversion
Serial and parallel are terms used to describe the method in which data or information is moved from
one place to another. SERIAL TRANSFER means that the data is moved along a single line one bit at a
time. A control pulse is required to move each bit. PARALLEL TRANSFER means that each bit of data
is moved on its own line and that all bits transfer simultaneously as they did in the parallel register. A
single control pulse is required to move all bits.
Figure 3-29 shows how both of these transfers occur. In each case, the four-bit word 1101 is being
transferred to a storage device. In view A, the data moves along a single line. Each bit of the data will be
stored by an individual control pulse. In view B, each bit has a separate input line. One control pulse will
cause the entire word to be stored.
