2-25Figure 2-24. —Logic gate combinations: A. Simple combination of OR gates; B. Simple combination of OR gates andAND gate; C. Output expression without the parentheses.In view B, gate 3 has been changed to an AND gate. The outputs of gates 1 and 2 do not change, butthe output expression of gate 3 does. In this case, the gate 3 output expression is (R+S)(T+V). Thisexpression is spoken, "quantity R OR S AND quantity T OR V." The parentheses are used to separate theinput terms and to indicate the AND function. Without the parentheses the output expression would readR+ST+V, which is representative of the circuit in view C. As you can see, this is not the same circuit asthe one depicted in view B. It is very important that the Boolean expressions be written and spokencorrectly.The Truth Table for the output expression of gate 3 (view B) will help you better understand theoutput. When studying this Truth Table, notice that the only time f is HIGH (logic 1) is when either orboth R and S AND either or both T and V are HIGH (logic 1).

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