3-9. Which of the following logic gates
requires all inputs to be TRUE at the
same time to produce a TRUE output?
3-10. Which of the following output Boolean
expressions is/are correct for an AND
1. f = AB
2. f = A·B
3. Both 1 and 2 above
3-11. Which of the following symbols
represents the output Boolean expression
Figure 3A. AND gate timing diagram.
IN ANSWERING QUESTIONS 3-12
THROUGH 3-14, REFER TO FIGURE 3A.
3-12. At which of the following times will the
output of a two input AND gate go
1. T2, T5, and T8
2. T4 only
3. T2, T6, and T10
4. T4 and T9
3-13. At which of the following times will the
output of the AND gate be LOW?
1. T1 to T4 and T5 to T8
2. T1 to T4 and T6 to T9
3. T4 to T6 and T8 to T10
4. T1 to T3 and T6 to T10